[RVV] add rvv f32 kernel for ibilinear#9964
Open
velonica0 wants to merge 3 commits into
Open
Conversation
dsharlet
approved these changes
Apr 14, 2026
dsharlet
approved these changes
Apr 17, 2026
dsharlet
approved these changes
Apr 29, 2026
Contributor
Author
|
ping @dsharlet |
Contributor
Author
|
Hi, @dsharlet @fbarchard |
Add RVV kernel for f32-ibilinear (bilinear interpolation) with LMUL={1,2,4}.
Tested on SpacemiT K1 CPU and K3 CPU, both VLEN=256.
Move f32-ibilinear entries from end of PROD/NON_PROD lists to alphabetical position (before f32-igemm) to avoid merge conflicts with other RVV PRs.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Part of #9954
Add RVV kernel for f32-ibilinear (bilinear interpolation) with LMUL={1,2,4}. Tested on SpacemiT K1 CPU and K3 CPU, both VLEN=256.